Vintage IBM System z10 EC MCM / Multi-Chip Module — Mainframe Processor Module

Extremely Rare Item

For sale is a rare vintage IBM System z10 EC MCM, also known as a multi-chip module, from IBM mainframe-class System z hardware.

This is the large brown ceramic IBM processor module used in IBM System z10 Enterprise Class-era systems. It has multiple chip sites on the top side and four dense gold contact-array regions on the reverse. This is an impressive display piece for collectors of IBM mainframes, System z hardware, semiconductor packaging, and vintage enterprise computing.

Type: System z10 EC MCM / Multi-Chip Module

System family: IBM System z10 Enterprise Class

Likely machine family: 2097

Era: late 2000s / circa 2008

Package: large brown ceramic MCM

Top side: multiple chip sites with thermal interface material/residue

Reverse side: four dense gold contact-array regions

Sold as: untested vintage collectible / display item

Condition is as shown in the photos. The top side has visible thermal compound/residue, surface wear, and discoloration from age and prior installation. The underside gold contact arrays are present and display well. Please inspect all photos carefully.

This item is untested. I do not have the original IBM system, book assembly, heatsink, or test equipment. It is being sold strictly as a collectible historical computer artifact, not as a guaranteed working electronic component.

Good for:

• IBM mainframe collectors
• System z / z10 collectors
• Vintage enterprise computing displays
• Semiconductor packaging collectors
• Museums / educational collections
• Lab, office, or studio display

Sold as-is, untested. It will be packed carefully with anti-static protection, foam padding, and a rigid box.

CMOS 11s chip Technology (65 nm)

5 Enterprise Quad Core Processor (PU) chips

● 21.97 mm x 21.17 mm

● 1.0 billion transistors/chip

● L1 cache/PU core

– 64 KB I-cache + 128 KB D-cache

● L1.5 cache/PU core

– 3 MB

● 4.4 GHz / 0.23 ns Cycle Time

2 Storage Control (SC) chips

● 21.11 mm x 21.71 mm

● 1.6 billion transistors/chip

● L2 cache 24 MB/SC chip (48 MB/MCM)

● L2 access to/from other MCM/Books

4 SEEPROM (S) chips

● Product data for MCM, chips and other engineering

information

Clock Functions distributed across PU and SC chips

_gsrx_vers_1736 (GS 9.9.5 (1736))